FAMOS: an efficient scheduling algorithm for high-level synthesis

This paper describes a new iterative improvement scheduling algorithm called FAMOS for the high-level synthesis of digital systems. The algorithm is based on Kernighan and Lin’s move acceptance strategy and various selection functions defined to represent the cost of hardware resources such as functional units and registers. As demonstrated in experiments, a main feature of the algorithm is that it can escape from local minima. The algorithm can deal with diverse design styles such as multi-cycle operations, chained operations, pipelined data-paths, pipelined functional units and conditional branches. Register costs and maximal time constraints are also considered. To efficiently represent information on the design styles, a graph model called Weighted Precedence Graph is proposed as a general model on which our scheduling algorithm is based. Despite the iterative nature, the proposed algorithm has a polynomial time complexity. Although the optimality of the algorithm is not guaranteed, optimal solutions were obtained for several examples available from earlier literatures.